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1/13 april 2005 stb130nh02l STP130NH02L n-channel 24v - 0.0034 ? - 120a d2pak/to-220 stripfet? iii power mosfet for dc-dc conversion rev. 2.0 figure 1: package table 1: general features typical r ds (on) = 0.0034 ? @ 10 v typical r ds (on) = 0.005 ? @ 5 v r ds(on) * qg industry?s benchmark conduction losses reduced switching losses reduced low threshold device surface-mounting d 2 pak (to-263) power package in tube (no suffix) or in tape & reel (suffix ?t4?) description the stb_p130nh02l utilizes the latest advanced design rules of st?s proprietary stripfet? technology. it is ideal in high performance dc-dc converter applications where efficiency is to be achieved at very high output currents. applications synchronous rectifications for telecom and computer or-ing diode table 2: ordering information type v dss r ds(on) i d stb130nh02l STP130NH02L 24 v 24 v < 0.0044 ? < 0.0044 ? 90 a (2) 90 a (2) sales type marking package packaging stb130nh02lt4 b130nh02l to-263 tape & reel STP130NH02L p130nh02l to-220 tube absolute maximum ratings symbol parameter value unit v spike(1) drain-source voltage rating 30 v v ds drain-source voltage (v gs = 0) 24 v v dgr drain-gate voltage (r gs = 20 k ? ) 24 v v gs gate- source voltage 20 v i d (2) drain current (continuous) at t c = 25c 90 a i d (2) drain current (continuous) at t c = 100c 90 a i dm (3) drain current (pulsed) 360 a p tot total dissipation at t c = 25c 150 w derating factor 1 w/c e as (4) single pulse avalanche energy 900 mj t stg storage temperature -55 to 175 c t j max. operating junction temperature 1 2 3 to-220 1 3 d 2 pak to-263 (suffix ?t4?) figure 2: internal schematic diagram
stb130nh02l STP130NH02L 2/13 table 4: thermal data electrical characteristics (t case = 25 c unless otherwise specified) table 5: off table 6: on (*) table 7: dynamic rthj-case rthj-amb t l thermal resistance junction-case thermal resistance junction-ambient maximum lead temperature for soldering purpose max max 1.0 62.5 300 c/w c/w c symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 25 ma, v gs = 0 24 v i dss zero gate voltage drain current (v gs = 0) v ds = 20 v v ds = 20 v t c = 125c 1 10 a a i gss gate-body leakage current (v ds = 0) v gs = 20 v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs i d = 250 a 1v r ds(on) static drain-source on resistance v gs = 10 v i d = 45 a v gs = 5 v i d = 22.5 a 0.0034 0.005 0.0044 0.008 ? ? symbol parameter test conditions min. typ. max. unit g fs (5) forward transconductance v ds = 10 v i d =45 a 55 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 15v f = 1 mhz v gs = 0 4450 1126 141 pf pf pf r g gate input resistance f = 1 mhz gate dc bias = 0 test signal level = 20 mv open drain 1.6 ?
3/13 stb130nh02l STP130NH02L table 8: switching on table 9: switching off table 10: source drain diode (1) garanted when external rg=4.7 ? and t f < t fmax . (5) pulsed: pulse duration = 300 s, duty cycle 1.5 %. ( 2 ) value limited by wire bonding (6) q oss = c oss * ? v in , c oss = c gd + c ds . see appendix a (3) pulse width limited by safe operating area. (7) gate charge for synchronous operation ( 4 ) starting t j = 25 o c, i d = 45a, v dd = 10v . symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd = 10 v i d = 45 a r g =4.7 ? v gs = 10 v (resistive load, figure ) 14 224 ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd =10 v i d =90 a v gs =10 v 69 13 9 93 nc nc nc q oss (6) output charge v ds = 16 v v gs = 0 v 27 nc q gls (7) third-quadrant gate charge v ds < 0 v v gs = 10 v 64 nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off delay time fall time v dd = 10 v i d = 45 a r g =4.7 ?, v gs = 10 v (resistive load, figure 3) 69 40 54 ns ns symbol parameter test conditions min. typ. max. unit i sd i sdm source-drain current source-drain current (pulsed) 90 360 a a v sd (5) forward on voltage i sd = 45 a v gs = 0 1.3 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 90 a di/dt = 100a/s v dd = 15 v t j = 150c (see test circuit, figure 5) 47 58 2.5 ns nc a electrical characteristics (continued) figure 3: safe operating area figure 4: thermal impedance
stb130nh02l STP130NH02L 4/13 figure 5: output characteristics figure 6: transfer characteristics figure 7: transconductance figure 8: static drain-source on resistance figure 9: gate charge vs gate-source voltage figure 10: capacitance variations
5/13 stb130nh02l STP130NH02L figure 11: normalized gate threshold voltage vs temperature figure 12: normalized on resistance vs temperature figure 13: source-drain diode forward characteristics figure 14: normalized breakdown voltage vs temperature . .
stb130nh02l STP130NH02L 6/13 figure 15: unclamped inductive load test circuit figure 17: switching times test circuits for resis- tive load figure 16: unclamped inductive waveform figure 18: gate charge test circuit figure 19: test circuit for inductive load switch- ing and diode recovery times
7/13 stb130nh02l STP130NH02L dim. mm. inch. min. typ. max. min. typ. typ. a 4.4 4.6 0.173 0.181 c 1.23 1.32 0.048 0.051 d 2.40 2.72 0.094 0.107 e 0.49 0.70 0.019 0.027 f 0.61 0.88 0.024 0.034 f1 1.14 1.70 0.044 0.067 f2 1.14 1.70 0.044 0.067 g 4.95 5.15 0.194 0.203 g1 2.40 2.70 0.094 0.106 h2 10 10.40 0.393 0.409 l2 16.40 0.645 l3 28.90 1.137 l4 13 14 0.511 0.551 l5 2.65 2.95 0.104 0.116 l6 15.25 15.75 0.600 0.620 l7 6.20 6.60 0.244 0.260 l9 3.50 3.93 0.137 0.154 dia 3.75 3.85 0.147 0.151 to-220 mechanical data
stb130nh02l STP130NH02L 8/13 dim. mm. inch. min. typ. max. min. typ. typ. a 4.4 4.6 0.173 0.181 a1 2.49 2.69 0.098 0.106 a2 0.03 0.23 0.001 0.009 b 0.7 0.93 0.028 0.037 b2 1.14 1.7 0.045 0.067 c 0.45 0.6 0.018 0.024 c2 1.21 1.36 0.048 0.054 d 8.95 9.35 0.352 0.368 d1 8 0.315 e 10 10.4 0.394 0.409 e1 8.5 0.334 g 4.88 5.28 0.192 0.208 l 15 15.85 0.591 0.624 l2 1.27 1.4 0.050 0.055 l3 1.4 1.75 0.055 0.069 m 2.4 3.2 0.094 0.126 r 0.4 0.015 v2 0 8 0 8 d 2 pak mechanical data
9/13 stb130nh02l STP130NH02L dim. mm inch min. max. min. max. a0 10.5 10.7 0.413 0.421 b0 15.7 15.9 0.618 0.626 d 1.5 1.6 0.059 0.063 d1 1.59 1.61 0.062 0.063 e 1.65 1.85 0.065 0.073 f 11.4 11.6 0.449 0.456 k0 4.8 5.0 0.189 0.197 p0 3.9 4.1 0.153 0.161 p1 11.9 12.1 0.468 0.476 p2 1.9 2.1 0075 0.082 r 50 1.574 t 0.25 0.35 .0.0098 0.0137 w 23.7 24.3 0.933 0.956 dim. mm inch min. max. min. max. a 330 12.992 b 1.5 0.059 c 12.8 13.2 0.504 0.520 d 20.2 0.795 g 24.4 26.4 0.960 1.039 n 100 3.937 t 30.4 1.197 base qty bulk qty 1000 1000 reel mechanical data * on sales type tube shipment (no suffix)* tape and reel shipment (suffix ?t4?)* d 2 pak footprint tape mechanical data
stb130nh02l STP130NH02L 10/13 sw1 sw2 appendix a buck converter: power losses estimation the power losses associated with the fets in a synchronous buck converter can be estimated using the equations shown in the table below. the formulas give a good approximation, for the sake of performance comparison, of how different pairs of devices affect the converter efficiency. however a very important parameter, the working temperature, is not considered. the real device behavior is really dependent on how the heat generated inside the devices is removed to allow for a safer working junction temperature. the low side ( sw2 ) device requires: ? very low r ds(on) to reduce conduction losses ? small q gls to reduce the gate charge losses ? small c oss to reduce losses due to output capacitance ? small q rr to reduce losses on sw 1 during its turn-on ? the c gd /c gs ratio lower than v th /v gg ratio especially with low drain to source voltage to avoid the cross conduction phenomenon; the high side ( sw1) device requires: ? small r g and l s to allow higher gate current peak and to limit the voltage feedback on the gate ? small q g to have a faster commutation and to reduce gate charge losses ? low r ds(on) to reduce the conduction losses.
11/13 stb130nh02l STP130NH02L high side switch (sw1) low side switch (sw2) conduction p * i * r 2 l ds(on)sw1 ) 1 ( * i * r 2 l ds(on)sw2 ? switching p g l i i * f * ) q (q * v gd(sw1) gsth(sw1) in + zero voltage switching recovery not applicable 1 f * q * v rr(sw2) in diode p conduction not applicable f * t * i * v deadtime l f(sw2) ) gate(q g p f * v * q gg g(sw1) f * v * q gg gls(sw2) qoss p 2 f * q * v oss(sw1) in 2 f * q * v oss(sw2) in parameter meaning d duty-cycle q gsth post threshold gate charge q gls third quadrant gate charge pconduction on state losses pswitching on-off transition losses pdiode conduction and reverse recovery diode losses pgate gate drive losses qoss p output capacitance losses 1 dissipated by sw1 during turn-on
stb130nh02l STP130NH02L 12/13 table 11: revision history date revision description of changes april 2005 2.0 added package to-220
13/13 stb130nh02l STP130NH02L i nformation furnished is believed to be accurate and reliable. ho wever, stmicroelectronics assumes no responsibility for the con sequence s o f use of such information nor for any infringement of patents or other rights of third parties which may result from its use. n o license is grante d b y implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicatio n are subje ct t o change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics produ cts are n ot a uthorized for use as critical components in life support devices or systems without express written approval of stmicroelectron ics. the st logo is registered trademark of stmicroelectronics all other names are the property of their respective owners. ? 2005 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco -singapore - spain - sweden - swit zerland - united kingdom - united states of america. www.st.com

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